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NXP Semiconductors /LPC11E6x /PMU /GPREG4

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Interpret as GPREG4

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED0 (DISABLE_HYSTERESIS_F)WAKEUPHYS 0 (ENABLE)WAKEPAD_DISABLE 0GPDATA

WAKEUPHYS=DISABLE_HYSTERESIS_F, WAKEPAD_DISABLE=ENABLE

Description

Deep power down control register

Fields

RESERVED

Reserved. Do not write ones to this bit.
WAKEUPHYS

WAKEUP pin hysteresis enable

0 (DISABLE_HYSTERESIS_F): Disable Hysteresis for WAKUP pin disabled.

1 (ENABLE): Enable. Hysteresis for WAKEUP pin enabled.
WAKEPAD_DISABLE

WAKEUP pin disable. Setting this bit disables the wake-up pin, so it can be used for other purposes. Never set this bit if you intend to use a pin to wake up the part from Deep power-down mode. You can only disable the wake-up pin if the RTC wake-up timer is enabled and configured. Setting this bit is not necessary if Deep power-down mode is not used.

0 (ENABLE): Enable. The wake-up function is enabled on pin PIO0_16.

1 (DISABLE): Disable. Setting this bit disables the wake-up function on pin PIO0_16.
GPDATA

Data retained during Deep power-down mode.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data